A storage system ensures reliability by multiplexing data. For example, a storage system enhances reliability by making redundant a storage device such as a hard disk drive (HDD) or a solid state drive (SSD) in which data is stored. There is another storage system that multiplexes a controller module (hereinafter referred to as a CM) configured to control reading and writing of data to and from a storage device and write the write data to the storage device after storing the write data in memories of multiple CMs. Since the write data is multiplexed in a preceding stage of the storage device, the reliability may be further enhanced.
In the storage system described above, in order to share the same write data among multiple CMs, the write data that one CM has received from a host computer is transmitted to the other CMs. The CMs are connected with each other through an input/output (I/O) serial interface such as Peripheral Component Interconnect Express (PCIe). Then, a device including a buffer memory, such as a PCIe switch for example, is provided between a central processing unit (CPU) included in the one CM and a CPU included in another CM.
As described above, multiplexing of CMs enhances the reliability. In addition, the reliability may be further enhanced if the arrival of data in inter-CM communications is guaranteed. For the guarantee of arrival in a data communication network, a technology has been proposed which achieves the guarantee of arrival of processed data between a transmission unit and a reception unit which are connected through a data communication network having a communication buffer. This transmission unit transmits dummy data that has a longer packet length than a communication buffer length, after the processed data, and thereby guarantees that the processed data preceding the dummy data has arrived at the reception unit.
A related technique is disclosed in, for example, Japanese Laid-open Patent Publication No. 06-164574.
The communication buffer in the technology described above does not return a response to a transmission source of stored data. On the other hand, among devices provided between CMs, there is a relay device, such as a PCIe switch, configured to return a response (hereinafter referred to as an Acknowledgement (ACK)) indicating that reception of data is completed, at the timing when the data is stored in a buffer memory.
Presence of such a relay device leads to the possibility that even when data has not arrived at a CPU that stores data in a memory of a CM on the receiving side, a CM on the transmitting side returns completion of reception of the data to a higher level device, in response to an ACK received from the relay device. Since there is a risk that abnormality occurs in the data at a subsequent stage of the relay device that has returned the ACK, achievement of the guarantee of arrival in inter-CM communications assuming such a relay device contributes to further enhancement of the reliability.